What happens when multiple interrupt occurs simultaneously? what is an Interrupt Vector? How are the interrupt recognized in microcomputers?
Ans An interrupt is a request from Vo or other devices to a processor for service or attention. An interrupt is any exceptional even that causes CPU to temporarily transfer its control from currently executing program to a different program which provide service to the exceptional event. Interrupts are generated for a variety of reasons usually related to the services related to external devices connected to the machine. Multiple interrupt may occurs simultaneously.
Multiple interrupt occurs when any currently executing program is interrupted by another program or process. If a program from a communication line and on another side may receive an instruction it is printing results, the printer on completion of every print operation will generate An interrupt, while the communication1ine controller will be generating the interrupt on arrival of a unit of data. Since, these two interrupts are independent, hence, the communication interrupt may occur while the printer interrupt is being processed. Multiple interrupts are handled in sequential order.
The scheme that can handle multiple interrupt at a time is to disable interrupts. If an interrupt occur while the first interrupt is being processed them it will remain pending, till the interrupts have been enable again. Therefore, in this scheme, the first few instructions in the processing of an interrupt disables other interrupts. After the interrupt service program for the current interrupt is completed, then the processor enables the interrupt and checks whether any other interrupt has occurred. Hence in this approach interrupts are handled in sequential order.
Depending upon the type of service desired, the interrupts are given a type. The service in the form of a procedure is called the interrupt service routine. In case, the first burst of data input is not processed before the second burst arrives, the data may be lost. When the CPU knows that an interrupt has occurred then the CPU execute an interrupt servicing program to service the interrupt.
Interrupt Vector: - The CPU processes on interrupt instruction using the interrupt vector Table (IVT). It is situated in the first 1k byte of memory and has a total of 256 entries each of 4 bytes. The entry in the IVT is identified by the number given in the interrupt instruction and points to an operating system subroutine. The actual address in this table varies from machine to machine. The device, which has made the interrupt request grabs the signal and responds by putting a word, which is an address of interrupt servicing program. This word is called on Interrupt Vector. This address is used for selecting an appropriate interrupt-servicing program.
A microcomputer has a programmable large-scale integrated microprocessor containing all the elements required to process binary encoded data. Providing a control line can interrupt the processor. This line connects the source of interrupts! to the processor. Then interrupt signal is stored in a register of the processor. This register is tested time to time by the processor to determine the occurrence of an interrupt. Once the processor known that an interrupt has occurred then the processor need to execute an Interrupt servicing program which tries to remove the condition which has caused the interrupt. The processor is assigned the address of the interrupt servicing program to be executed. The execution of an instruction in the processor is done using certain set of registers and their respective circuit. The essential context of the processor is saved either into a special save are in main memory or into a stack at the beginning of interrupt processing. This context is restored when the interrupt service program is finished therefore, the interrupted program execution can be restarted from the point of interruption. The instruction execution resumes as soon as the interrupt processing is completed. Therefore, the user instruction need not contain any special code for interrupt handling. This job lies with the processor and the operating system which are also responsible for suspending the execution of the user instruction and after interrupt handing resumes the user instruction from same point.
Showing posts with label interrupt. Show all posts
Showing posts with label interrupt. Show all posts
Tuesday, June 21, 2011
Saturday, May 30, 2009
Interrupt and its use in assembly language
Interrupt:
The interrupt is defined loosely to any exceptional event that causes CPU to temporarily transfer its control from currently executing program to a different program, which provide service to the exceptional event. An interrupt may be generated by a number of sources, which may be either internal or external to the CPU.
OCCURRING:
There is a problem here in the computer’s ability to know when a peripheral device has performed a given operation. Suppose we wish to find some data on a magnetic tape and are unwilling to wait for the tape to be searched, desiring to perform other calculations while waiting. If the computer must continually look to see whether the tape drive now has the data available, then time is lost and programming complexity is increased. To alleviate this, the computer bus is generally provided with control lines which are called interrupt lines, and a peripheral device can raise one of these lines when it has completed an action and is ready for attention.
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Interrupt use in Assembly language:
The 8085 has five interrupt signals that cab be used to interrupt a program execution. One of the signals, INTR (interrupt Request), is identical to the 8080A microprocessor interrupt signal (INT) the others are enhancements to the 8080A . the microprocessor acknowledges an interrupt by the ITA ( interrupt acknowledge) signal.
The 8080A interrupt processes controlled by the interrupt Enable flip-flop , which is internal to the processor can be set or reset by using software instructions. If the flip-flop is enabled and the input to the interrupt signal INT (pin 14) goes high, the microprocessor is interrupted. This is a mask able interrupt and can be disabled. The 8080A has only one interrupt signal; it does not have a non mask able interrupt. The 8085 has an interrupt signal called INTR (pin 10) functionally identical with the 8080A interrupt. However, the 8085 has additional interrupt signals as well. To avoid confusion, we will refer to the interrupt process that is common to both the processors as the 8080A interrupt. The best way to describe the 8080A interrupt process is to compare it to a telephone with a blinking light instead of a rig.
The cpu responds to the interrupt signal by storing the return address from the program counter into a memroy stack and then control branches to a service routine the processes the required I/O transfer. The way that the unit to another. In principle , there are two methods for accomplishing this. One is called the branch address is assigned to a fixed location in memory. in a vectored interrupt , the source that interrupts supplies the branch information computers the interrupt vector to the computer. The information is called the interrupt vector.
The interrupt is defined loosely to any exceptional event that causes CPU to temporarily transfer its control from currently executing program to a different program, which provide service to the exceptional event. An interrupt may be generated by a number of sources, which may be either internal or external to the CPU.
OCCURRING:
There is a problem here in the computer’s ability to know when a peripheral device has performed a given operation. Suppose we wish to find some data on a magnetic tape and are unwilling to wait for the tape to be searched, desiring to perform other calculations while waiting. If the computer must continually look to see whether the tape drive now has the data available, then time is lost and programming complexity is increased. To alleviate this, the computer bus is generally provided with control lines which are called interrupt lines, and a peripheral device can raise one of these lines when it has completed an action and is ready for attention.
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Interrupt use in Assembly language:
The 8085 has five interrupt signals that cab be used to interrupt a program execution. One of the signals, INTR (interrupt Request), is identical to the 8080A microprocessor interrupt signal (INT) the others are enhancements to the 8080A . the microprocessor acknowledges an interrupt by the ITA ( interrupt acknowledge) signal.
The 8080A interrupt processes controlled by the interrupt Enable flip-flop , which is internal to the processor can be set or reset by using software instructions. If the flip-flop is enabled and the input to the interrupt signal INT (pin 14) goes high, the microprocessor is interrupted. This is a mask able interrupt and can be disabled. The 8080A has only one interrupt signal; it does not have a non mask able interrupt. The 8085 has an interrupt signal called INTR (pin 10) functionally identical with the 8080A interrupt. However, the 8085 has additional interrupt signals as well. To avoid confusion, we will refer to the interrupt process that is common to both the processors as the 8080A interrupt. The best way to describe the 8080A interrupt process is to compare it to a telephone with a blinking light instead of a rig.
The cpu responds to the interrupt signal by storing the return address from the program counter into a memroy stack and then control branches to a service routine the processes the required I/O transfer. The way that the unit to another. In principle , there are two methods for accomplishing this. One is called the branch address is assigned to a fixed location in memory. in a vectored interrupt , the source that interrupts supplies the branch information computers the interrupt vector to the computer. The information is called the interrupt vector.
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